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NXP Semiconductors /LPC408x_7x /ETHERNET /SUPP

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Interpret as SUPP

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESERVED0 (SPEED)SPEED 0RESERVED

Description

PHY Support register.

Fields

RESERVED

Unused
SPEED

This bit configures the Reduced MII logic for the current operating speed. When set, 100 Mbps mode is selected. When cleared, 10 Mbps mode is selected.
RESERVED

Unused

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data